Digital Logic IC

Digital logic ICs are a collection of basic digital logic circuits, available in both TTL and CMOS varieties.
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CD4017 Decade Counter

The count advances as the clock input becomes high (on the rising-edge). Each output Q0-Q9 goes high in turn as counting advances. For some functions (such as flash sequences) outputs may be combined using diodes.

The reset input should be low (0V) for normal operation (counting 0-9). When high it resets the count to zero (Q0 high). This can be done manually with a switch between reset and +Vs and a 10k resistor between reset and 0V. Counting to less than 9 is achieved by connecting the relevant output (Q0-Q9) to reset, for example to count 0,1,2,3 connect Q4 to reset.

The disable input should be low (0V) for normal operation. When high it disables counting so that clock pulses are ignored and the count is kept constant.

The ÷10 output is high for counts 0-4 and low for 5-9, so it provides an output at 1/10 of the clock frequency. It can be used to drive the clock input of another 4017 (to count the tens).

PKR 20.00
4026 decade counter and 7-segment display driver

The count advances as the clock input becomes high (on the rising-edge). The outputs a-g go high to light the appropriate segments of a common-cathode 7-segment display as the count advances. The maximum output current is about 1mA with a 4.5V supply and 4mA with a 9V supply. This is sufficient to directly drive many 7-segment LED displays. The table below shows the segment sequence in detail.

The reset input should be low (0V) for normal operation (counting 0-9). When high it resets the count to zero.

The disable clock input should be low (0V) for normal operation. When high it disables counting so that clock pulses are ignored and the count is kept constant.

The enable display input should be high (+Vs) for normal operation. When low it makes outputs a-g low, giving a blank display. The enable out follows this input but with a brief delay.

The ÷10 output (h in table) is high for counts 0-4 and low for 5-9, so it provides an output at 1/10 of the clock frequency. It can be used to drive the clock input of another 4026 to provide multi-digit counting.

The not 2 output is high unless the count is 2 when it goes low.

4026 outputs table

PKR 20.00
4028 BCD to decimal (1 of 10) decoder

The appropriate output Q0-9 becomes high in response to the BCD (binary coded decimal) input. For example an input of binary 0101 (=5) will make output Q5 high and all other outputs low.

The 4028 is a BCD (binary coded decimal) decoder intended for input values 0 to 9 (0000 to 1001 in binary). With inputs from 10 to 15 (1010 to 1111 in binary) all outputs are low.

Note that the 4028 can be used as a 1-of-8 decoder if input D is held low.

PKR 20.00
4511 BCD to 7-segment display driver

The appropriate outputs a-g become high to display the BCD (binary coded decimal) number supplied on inputs A-D. The outputs a-g can source up to 25mA. The 7-segment display segments must be connected between the outputs and 0V with a resistor in series (330ohm with a 5V supply). A common cathode display is required.

Display test and blank input are active-low so they should be high for normal operation. When display test is low all the display segments should light (showing number 8). When blank input is low the display is blank (all segments off).

The store input should be low for normal operation. When store is high the displayed number is stored internally to give a constant display regardless of any changes which may occur to the inputs A-D.

The 4511 is intended for BCD (binary coded decimal). Inputs values from 10 to 15 (1010 to 1111 in binary) will give a blank display (all segments off).

PKR 20.00
CD4024 7-bit (÷128) ripple counter

The 4024 is a ripple counter so beware that glitches may occur in any logic gate systems connected to its outputs due to the slight delay before the later counter outputs respond to a clock pulse.

The count advances as the clock input becomes low (on the falling-edge), this is indicated by the bar over the clock label. This is the usual clock behaviour of ripple counters and it means a counter output can directly drive the clock input of the next counter in a chain.

Output Qn is the nth stage of the counter, representing 2n, for example Q4 is 24 = 16 (1/16 of clock frequency) and Q7 is 27 = 128 (1/128 of clock frequency).

The reset input should be low for normal operation (counting). When high it resets the count to zero (all outputs low).

PKR 20.00
CD4029 up/down synchronous counter with preset

The 4029 is a synchronous counter so its outputs change precisely together on each clock pulse. This is helpful if you need to connect the outputs to logic gates because it avoids the glitches which occur with ripple counters.

The count occurs as the clock input becomes high (on the rising-edge). The up/down input determines the direction of counting: high for up, low for down. The state of up/down should be changed when the clock is high.

For normal operation (counting) preset, and carry in should be low.

The binary/decade input selects the type of counter: 4-bit binary (0-15) when high; decade (0-9) when low.

The counter may be preset by placing the desired binary number on the inputs A-D and briefly making the preset input high. There is no reset input, but preset can be used to reset the count to zero if inputs A-D are all low.

PKR 20.00
CD4060 14-bit (÷16,384) ripple counter with internal oscillator

The 4060 is a ripple counter so beware that glitches may occur in any logic gate systems connected to its outputs due to the slight delay before the later counter outputs respond to a clock pulse.

The count advances as the clock input becomes low (on the falling-edge), this is indicated by the bar over the clock label. This is the usual clock behaviour of ripple counters and it means a counter output can directly drive the clock input of the next counter in a chain. The clock can be driven directly, or connected to the internal oscillator (see below).

Output Qn is the nth stage of the counter, representing 2n, for example Q4 is 24 = 16 (1/16 of clock frequency) and Q14 is 214 = 16384 (1/16384 of clock frequency). Note that Q1-3 and Q11 are not available.

The reset input should be low for normal operation (counting). When high it resets the count to zero (all outputs low).

The 4060 includes an internal oscillator. The clock signal may be supplied in three ways:

  • From an external source to the clock input, as for a normal counter. In this case there should be no connections to external C and external R (pins 9 and 10).
  • RC oscillator as shown in the diagram. The oscillator drives the clock input with an approximate frequency f = 1/(2×R1×C) (it partly depends on the supply voltage). R1 should be at least 50kohm if the supply voltage is less than 7V. R2 should be between 2 and 10 times R1.
  • Crystal oscillator as shown in the diagram, note that there is no connection to pin 9. The 32768 Hz crystal will give a 2Hz signal at the last output, Q14.

Also see: 4020 (14-bit) and 4040 (12-bit), neither of these have internal oscillators.

4060 RC oscillator connections 4060 crystal oscillator connections
PKR 20.00
CD4511 BCD to 7-segment display driver

The appropriate outputs a-g become high to display the BCD (binary coded decimal) number supplied on inputs A-D. The outputs a-g can source up to 25mA. The 7-segment display segments must be connected between the outputs and 0V with a resistor in series (330ohm with a 5V supply). A common cathode display is required.

Display test and blank input are active-low so they should be high for normal operation. When display test is low all the display segments should light (showing number 8). When blank input is low the display is blank (all segments off).

The store input should be low for normal operation. When store is high the displayed number is stored internally to give a constant display regardless of any changes which may occur to the inputs A-D.

The 4511 is intended for BCD (binary coded decimal). Inputs values from 10 to 15 (1010 to 1111 in binary) will give a blank display (all segments off).

PKR 0.00
Quad 2 Input CMOS Gates
  • 4001 quad 2-input NOR
  • 4011 quad 2-input NAND
  • 4070 quad 2-input EX-OR
  • 4071 quad 2-input OR
  • 4077 quad 2-input EX-NOR
  • 4081 quad 2-input AND
  • 4093 quad 2-input NAND with Schmitt trigger inputs

The 4093 has Schmitt trigger inputs to provide good noise immunity. They are ideal for slowly changing or noisy signals. The hysteresis is about 0.5V with a 4.5V supply and almost 2V with a 9V supply.

PKR 5.00
CD4051 Analog Digital Multiplexer Demultiplexer

A multiplexer or demultiplexer enables you to expand the in-and outputs on your Arduino board. The 4051 is an 8 channel analog multiplexer / demultiplexer, thus:

  • If you use the 4051 as a Multiplexer: You can choose between 8 different inputs and select just one you want to read at the time.
  • If you use the 4051 as a Demultiplexer you can choose between 8 different outputs and select just one you want to write at the time.

Futhermore, the 4051 is able to work with analog values; in the case of the Arduino, you are able to use the analog inputs with a voltage between 0-5V and route them to an Analog-In Pin on your Arduino.

PKR 25.00
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